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[Software Engineering8bitRISCmicroprocessor

Description: this a 8-bit risc micro process,Th eM C Ud esignedis c ompatiblew ith PIC16C57 o microchip Technology Inc.in the instruction system
Platform: | Size: 3850590 | Author: 王明 | Hits:

[Other resourceethernet_verilog

Description: 这是一个很好的Verilog 编写的8位RISC CPU源码(可做为MCU),并且包括完整的C 语言的测试代码。-This is a very good preparation Verilog 8-bit RISC CPU source (available as MCU), and includes a complete C language test code.
Platform: | Size: 79444 | Author: 张念华 | Hits:

[SourceCoderisc cpu

Description: risc 8 bit cpu core verilog
Platform: | Size: 139464 | Author: maxwellnul | Hits:

[ARM-PowerPC-ColdFire-MIPSethernet_verilog

Description: 这是一个很好的Verilog 编写的8位RISC CPU源码(可做为MCU),并且包括完整的C 语言的测试代码。-This is a very good preparation Verilog 8-bit RISC CPU source (available as MCU), and includes a complete C language test code.
Platform: | Size: 78848 | Author: 张念华 | Hits:

[SCMVHDL实现简单的8位CPU2

Description: 用VHDL实现8位的单片机!里面 有开发过程和代码阿!很详细的哦-using VHDL eight of SCM! Inside the development process and code Ah! Detailed oh
Platform: | Size: 53248 | Author: 冯海 | Hits:

[ARM-PowerPC-ColdFire-MIPSRISC_Core.ZIP

Description: 这是一篇关于8位RISC CPU设计的文章,其中包含了用Verilog语言编写的CPU内核程序-This is an 8-bit RISC CPU on the design of the article, which includes using the Verilog language CPU core procedures
Platform: | Size: 340992 | Author: jinzhoulang | Hits:

[Software Engineering8bitRISCmicroprocessor

Description: this a 8-bit risc micro process,Th eM C Ud esignedis c ompatiblew ith PIC16C57 o microchip Technology Inc.in the instruction system
Platform: | Size: 3850240 | Author: 王明 | Hits:

[VHDL-FPGA-VerilogRiscCPU8

Description: 可综合的VerilogHDL设计实例: ---简化的RISC 8位CPU设计简介--- -VerilogHDL be integrated design example:--- simplified RISC 8 bit CPU design Introduction---
Platform: | Size: 219136 | Author: hulin | Hits:

[VHDL-FPGA-Verilogrisc_cpu

Description: 8位risc cpu的编写,使用quartus软件对其进行写入,里面内置乘法器、除法器等模块-8-bit risc cpu the preparation, use the Quartus software to write, which built-in multiplier, divider modules
Platform: | Size: 814080 | Author: 瑞翔 | Hits:

[VHDL-FPGA-VerilogRISC_Core

Description: 这是用VerilogHDL描述的一个8位精简指令集处理器,包含完整代码,各种文档,以及测试环境。-This is described in VerilogHDL with an 8-bit RISC processor, including the integrity of the code, a variety of documents, as well as the test environment.
Platform: | Size: 316416 | Author: wdy2004 | Hits:

[VHDL-FPGA-Verilogfreerisc8_11

Description: 一个基于VHDL 的简单8位CPU的IP core核心代码-VHDL based on a simple 8-bit CPU core code of the IP core
Platform: | Size: 275456 | Author: wfs | Hits:

[VHDL-FPGA-VerilogRISC8.ZIP

Description: verilog RISC8 cpu CORE 8位RISC CPU 内核源码(VERILOG 版)-verilogRISC8 cpu CORE8-bit RISC CPU core source (VERILOG version)
Platform: | Size: 80896 | Author: likui | Hits:

[Othercomputer2

Description: 一款8位RISC MCU的设计-An 8-bit RISC MCU Design .........
Platform: | Size: 794624 | Author: steven | Hits:

[VHDL-FPGA-Verilog8risc

Description: 8位RISC CPU,包括alu,count,machine-8 bit risc cpu
Platform: | Size: 3072 | Author: 刘成诚 | Hits:

[Windows Develop8BitRISC_CPU(VERILOG)

Description: 8位risc内核源代码,内有体统框图,较其他详细。适合初学者学习-8-bit risc kernel source code, there are decency diagram, compared with other details. Suitable for beginners to learn
Platform: | Size: 77824 | Author: lsj | Hits:

[VHDL-FPGA-VerilogChapter11-13

Description: 第十一章到第十三章的代码 本书通过100多个模块实例,详细地讲解了Verilog HDL程序设计语言,全书共分13章,内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等,实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench,所举实例具有很强的实用性和代表性,每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter XI to the 13th chapter of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
Platform: | Size: 5088256 | Author: xiao | Hits:

[VHDL-FPGA-Verilog8bit_RISC_CPU_RTL_Code

Description: 8位RISC CPU 内核源码(VERILOG版)-8 bit RSIC CPU RTL code(Verilog)
Platform: | Size: 79872 | Author: 曾亮 | Hits:

[VHDL-FPGA-Verilog8bitRISCCPU

Description: 8bit RISC cpu 设计资料 包含夏宇闻老师的教程第8章-8bit RISC cpu design
Platform: | Size: 816128 | Author: dyfdown | Hits:

[VHDL-FPGA-VerilogRISC_cpu

Description: 基于RISC结构的8位微处理器的verilog源代码,很好的东西。-8-bit RISC-based microprocessor architecture verilog source code, a good thing.
Platform: | Size: 263168 | Author: 西门吹雪 | Hits:

[VHDL-FPGA-Verilog8-bit-risc-in-vhdl.vhd

Description: risc processor in vhdl
Platform: | Size: 4096 | Author: pradeep | Hits:
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